1. Field of the Invention
The embodiments disclosed herein are related to metal oxide semiconductor field effect transistors (MOSFETs) and, more particularly, to a MOSFET structure having phase transition material incorporated into one or more components in order to minimize leakage current, such as Gate-Induced Drain Leakage (GIDL), when the MOSFET is in its OFF state.
2. Description of the Related Art
In metal oxide semiconductor field effect transistors (MOSFETs), Gate-Induced Drain Leakage (GIDL) often places a lower bound on leakage and/or gate dielectric thickness for low-power designs. GIDL refers to the high electric field and, particularly, the band-to-hand tunneling that occurs at the channel region to drain region interface overlapped by the gate structure, when the MOSFET is in an OFF state and when the drain region is close to the power-supply voltage such that the voltage difference between the drain region and the source region (VDS) is relatively high. To minimize GIDL, MOSFETs are often designed such that the gate structure does not or only minimally overlaps the interface and/or with a relatively thick gate dielectric layer. However, both solutions tend to lower drive current, thereby result in reduced circuit speed when the MOSFET is in the ON state. Therefore, there is a need in the art for a MOSFET structure and method of forming the structure that avoids or at least minimizes leakage current, such as GIDL, when the MOSFET is in the OFF state, without compromising the drive current required to maintain a desired circuit speed, when the MOSFET is in the ON state.